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Samsung patents chip design with specific insulating layers and bonding patterns

Patent drawing
Patent drawing from the official filing.

Samsung has filed a patent application for a semiconductor device structure that uses a substrate with distinct regions. The design features an insulating layer with specific trenches and recesses, along with a liner layer and a bonding pattern to connect components.

Why it mattersThis is a routine improvement to chip manufacturing techniques that helps engineers build more reliable internal connections within a processor.

In the filing’s own words

A semiconductor device may include a first substrate including a first region and a second region, a first insulating layer on the first substrate, the first insulating layer having a first surface and a second surface, the first surface being adjacent to the first substrate and the second surface being opposite the first surface, the first insulating layer including a first trench on the first region and a first recess on the second region, the first recess being recessed from the second surface of the first insulating layer, a first insulating liner layer on the second surface of the first insulating layer, the first insulating liner layer extending onto an inner surface of the first recess, and a first bonding pattern in the first trench.

What exactly they claim (claim 1)

1. A semiconductor device comprising: a first substrate including a first region and a second region; a first insulating layer on the first substrate, the first insulating layer having a first surface and a second surface, the first surface being adjacent to the first substrate and the second surface being opposite the first surface, the first insulating layer including a first trench on the first region and a first recess on the second region, the first recess being recessed from the second surface of the first insulating layer; a first insulating liner layer on the second surface of the first insulating layer, the first insulating liner layer extending onto an inner surface of the first recess; and a first bonding pattern in the first trench.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR DEVICE INCLUDING INSULATING LAYERS AND METHOD FOR MANUFACTURING THE SAME
Publication number
US20260334284A1
Application number
19540965
Filed
Feb 16, 2026
Published
Oct 22, 2026
Inventors
5
Claims
20

Classified under

H10W 72/967 Electricity & electronicsH10W 72/934 Electricity & electronicsH10W 72/936 Electricity & electronicsH10W 72/9445 Electricity & electronicsH10W 72/963 Electricity & electronicsH10W 90/792 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.