Samsung patents chip design that skips empty data to speed up AI

1. A neural network accelerator tile for exploiting input sparsity defining a set of weight lanes and a set of activation lanes, each weight lane corresponding to an activation lane, the neural network accelerator tile comprising: a weight memory configured to supply each weight lane of the set of weight lanes with a weight and a weight selection metadata of the respective weight lane weight indicating a position of the weight lane weight in a weight schedule, the position of the weight lane weight indicating one or more cycles during which the weight lane weight is to be combined with one or more input activation values determined based on the activation lanes corresponding to the one or more input activation values; an activation selection unit comprising buffers configured to receive a set of input activation values and activation multiplexers configured to rearrange the set of input activation values based on the position of the weight lane weight in the weight schedule, to supply each activation lane with a set of rearranged activation values; a set of multiplexers, the set of multiplexers including at least one multiplexer per pair of activation and weight lanes, each multiplexer configured to select a combination activation value for the activation lane from the activation lane set of rearranged activation values based on the weight lane weight selection metadata of the respective weight lane weight indicating the position of the weight lane weight in the weight schedule; and a set of combination units, the set of combination units including at least one combination unit per multiplexer, each combination unit comprising at least one of a multiplier, an adder, and a shifter configured to combine the activation lane combination value with the weight lane weight to output a weight lane product, wherein a first multiplexer of the set of multiplexers selects a first rearranged activation value associated with a first weight lane weight from one of an activation lane for a lookahead operation of a first weight lane and an activation lane for a lookaside operation of the first weight lane based on a first weight selection metadata of the first weight lane, wherein the lookahead operation is an operation to remove ineffectual weights of a first weight schedule of the first weight lane using first weight lane weights of the first weight lane, wherein the lookaside operation is an operation to remove ineffectual weights of the first weight schedule of the first weight lane using second weight lane weights of a second weight lane, and wherein each effective weight of the first weight schedule of the first weight lane has a corresponding piece of metadata to identify the position of the effective weight in an original dense weight schedule such that the effective weight is matched at runtime with a corresponding activation value.