Samsung patents chip layout with extra test areas in the gaps
Samsung describes a semiconductor design that places multiple groups of test structures in the scribe lane, which is the unused space between functional chip sections. These test areas contain specific wells with impurities to help verify the manufacturing process.
In the filing’s own words
A semiconductor device includes a substrate including a plurality of cell areas and a scribe lane area defining the plurality of cell areas; a first test element group on the scribe lane area; a second test element group on the scribe lane area; and a third test element group on the scribe lane area. The first test element group includes a plurality of first wells spaced apart along a first direction and containing impurities of a first conductivity type. The second test element group includes a plurality of second wells spaced apart from each other along the first direction and containing impurities of the first conductivity type. The third test element group includes a third well containing impurities of the first conductivity type.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a substrate including a plurality of cell areas and a scribe lane area defining the plurality of cell areas; a first test element group on the scribe lane area; a second test element group on the scribe lane area; and a third test element group on the scribe lane area, wherein the first test element group includes a plurality of first wells spaced apart along a first direction and containing impurities of a first conductivity type, wherein the second test element group includes a plurality of second wells spaced apart from each other along the first direction and containing impurities of the first conductivity type, and wherein the third test element group includes a third well containing impurities of the first conductivity type.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE
- Publication number
- US20260334170A1
- Application number
- 19459585
- Filed
- Jan 26, 2026
- Published
- Oct 22, 2026
- Inventors
- 3
- Claims
- 20
Classified under
H10P 74/273 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.