Samsung patents chip design with shared contacts for smaller transistors
Samsung has filed a patent for a semiconductor device that uses a specific arrangement of P-type and N-type materials around a gate structure. The design features a single shared contact connecting two different material types on one side, while separate contacts are used on the other side to manage electrical flow.
In the filing’s own words
A semiconductor device includes first and second active patterns extending on an insulating base layer, an inactive gate structure crossing the first and second active patterns, a first P-type epitaxial pattern and a second P-type epitaxial pattern respectively disposed on first and second sides of the inactive gate structure opposing each other, a first N-type epitaxial pattern and a second N-type epitaxial pattern respectively disposed on the first and second sides of the inactive gate structure opposing each other, a shared contact connecting the first P-type epitaxial pattern and the first N-type epitaxial pattern to each other, on the first side of the inactive gate structure, and a first contact and a second contact respectively connected to the second P-type epitaxial pattern and the second N-type epitaxial pattern, on the second side of the inactive gate structure.
What exactly they claim (claim 1)
1. A semiconductor device comprising: an insulating base layer having a first surface and a second surface facing opposite to each other; first and second active patterns extending in a first direction on the first surface of the insulating base layer; an inactive gate structure crossing the first and second active patterns in a second direction, wherein the second direction intersects the first direction; a first P-type epitaxial pattern and a second P-type epitaxial pattern on the first active pattern, on respective first and second sides of the inactive gate structure, wherein the first and second sides of the inactive gate structure are opposite sides of the inactive gate structure; a first N-type epitaxial pattern and a second N-type epitaxial pattern on the second active pattern, respectively on the first and second sides of the inactive gate structure; a shared contact connecting the first P-type epitaxial pattern and the first N-type epitaxial pattern; and a first contact connected to the second P-type epitaxial pattern and a second contact connected to the second N-type epitaxial pattern.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE WITH EPITAXIAL PATTERNS
- Publication number
- US20260333864A1
- Application number
- 19637707
- Filed
- Apr 2, 2026
- Published
- Oct 22, 2026
- Inventors
- 2
- Claims
- 20
Classified under
H10D 86/201 Electricity & electronicsH10D 30/503 Electricity & electronicsH10D 30/506 Electricity & electronicsH10D 62/151 Electricity & electronicsH10D 64/256 Electricity & electronicsH10D 64/518 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.