Samsung patents angled chip design to fit more transistors
Samsung describes a semiconductor structure where the central channel of a transistor is tilted at an angle rather than running straight across the chip. The electrical connections to the transistor are also positioned at a specific angle relative to this channel to optimize the layout. This geometric arrangement allows for tighter packing of components within the silicon.
In the filing’s own words
A semiconductor device includes a substrate, a fin-type body protruding vertically on the substrate and extending in a first horizontal direction, a first source/drain region on a first side of the fin-type body and a second source/drain region on a second side of the fin-type body, a channel region between the first and second source/drain regions in the fin-type body, a gate electrode surrounding the channel region and extending in a second horizontal direction that is perpendicular to and intersects with the first horizontal direction, a gate dielectric film between the channel region and the gate electrode, and a first contact on the first source/drain region and a second contact on the second source/drain region. The channel region extends in a first oblique direction, and an imaginary straight line connecting furthest ends of the first and second contacts extends in a second oblique direction transverse to the first oblique direction.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a substrate; a fin-type body protruding vertically on the substrate and extending in a first horizontal direction; a first source/drain region on a first side of the fin-type body and a second source/drain region on a second side of the fin-type body; a channel region between the first source/drain region and the second source/drain region in the fin-type body; a gate electrode surrounding the channel region and extending in a second horizontal direction that is perpendicular to and intersects the first horizontal direction; a gate dielectric film between the channel region and the gate electrode; and a first contact on the first source/drain region and a second contact on the second source/drain region, wherein the channel region extends in a first oblique direction, and an imaginary straight line connecting furthest ends of the first contact and the second contact extends in a second oblique direction transverse to the first oblique direction.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE
- Publication number
- US20260333802A1
- Application number
- 19649323
- Filed
- Apr 16, 2026
- Published
- Oct 22, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H10D 62/292 Electricity & electronicsH10D 30/6211 Electricity & electronicsH10D 30/6219 Electricity & electronicsH10D 64/257 Electricity & electronicsH10D 64/514 Electricity & electronicsH10D 64/518 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.