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Samsung patents chip design that flips transistors upside down

Samsung describes a method for making semiconductor chips by building the core transistor components on a thin layer and then removing the original base. This process allows wiring to be added to the back of the chip, connecting directly to the transistor's source and drain areas. The design uses specific vertical distances between layers to ensure these connections work correctly.

Why it mattersThis technique helps manufacturers pack more components into smaller spaces, which is a standard step in making computer chips faster and more efficient.

In the filing’s own words

A semiconductor device includes a back interlayer insulating film, a back wiring line in the back interlayer insulating film, a fin-shaped pattern on a first surface of the back wiring line, a field insulating film disposed on the fin-shaped pattern, a source/drain pattern on the fin-shaped pattern, a source/drain contact disposed on the source/drain pattern and connected to the source/drain pattern and a contact connecting via connecting the back wiring line and the source/drain contact, and is in contact with the back wiring line. The contact connecting via includes a first surface connected to the source/drain contact, and a second surface contacted to the back wiring line. A height from a second surface of the back wiring line to an upper surface of the field insulating film is smaller than a height from the second surface of the back wiring line to the first surface of the contact connecting via.

What exactly they claim (claim 1)

1. A method for manufacturing a semiconductor device, the method comprising: forming a fin-shaped pattern protruding from an upper surface of a substrate in a first direction, the fin-shaped pattern extending in a second direction; forming a field insulating film on the upper surface of the substrate, the field insulating film exposing an upper surface of the fin-shaped pattern; forming a source/drain pattern on the upper surface of the fin-shaped pattern; forming a contact connecting via penetrating the field insulating film, the contact connecting via including a first surface and a second surface opposite to the first surface in the first direction, wherein a distance from the upper surface of the substrate to the first surface is greater than a distance from the upper surface of the substrate to the upper surface of the field insulating film; forming a source/drain contact on the source/drain pattern, the source/drain contact being connected to the source/drain pattern; removing the substrate, a portion of the fin-shaped pattern and a portion of the field insulating film to form a lower surface of the fin-shaped pattern and a lower surface of the field insulating film, and to expose the second surface of the contact connecting via; forming a back interlayer insulating film on the lower surface of the field insulating film; and forming a back wiring line extending in the second direction in the back interlayer insulating film, the back wiring line being in contact with the second surface of the contact connecting via, wherein the contact connecting via connects the source/drain contact with the back wiring line.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
SEMICONDUCTOR DEVICE
Publication number
US20260333743A1
Application number
19724321
Filed
Jun 29, 2026
Published
Oct 22, 2026
Inventors
5
Claims
20

Classified under

H10D 30/62 Electricity & electronicsH10D 30/014 Electricity & electronicsH10D 30/024 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6757 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.