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Samsung patents chip method using two-step insulation fill

Patent drawing
Patent drawing from the official filing.

This filing describes a specific way to build memory chips by filling trenches with two different types of insulating material. The process uses a second layer with less oxygen than the first to improve the structure's stability during manufacturing.

Why it mattersThis is a routine improvement in semiconductor fabrication that helps manufacturers create more reliable memory components.

In the filing’s own words

A method of fabricating a semiconductor device including: preparing a substrate including cell and peripheral regions; forming a gate stack and a bit line structure on the peripheral and cell regions, respectively; forming first and second trenches on the cell and peripheral regions, respectively, to form landing pads and a peripheral contact and a peripheral circuit wiring line on the cell and peripheral regions, respectively; forming a preliminary interface layer and a first preliminary insulating pattern; partially removing the first preliminary insulating pattern to form first insulating and first wiring insulating patterns in the first and second trenches, respectively; forming a second preliminary insulating pattern; and removing the second preliminary insulating pattern to form second insulating and second wiring insulating patterns filling portions of the first and second trenches, respectively, wherein the second preliminary insulating pattern has an oxygen concentration lower than that of the first preliminary insulating pattern.

What exactly they claim (claim 1)

1. A method of fabricating a semiconductor device, the method comprising: preparing a substrate including a cell region and a peripheral region; forming a gate stack on the peripheral region of the substrate; forming a bit line structure on the cell region of the substrate; forming a first trench on the cell region of the substrate and a second trench on the peripheral region of the substrate to form landing pads on the cell region and a peripheral contact and a peripheral circuit wiring line on the peripheral region; sequentially forming a preliminary interface layer and a first preliminary insulating pattern on the substrate; partially removing the first preliminary insulating pattern to form a first insulating pattern in the first trench and a first wiring insulating pattern in the second trench; forming a second preliminary insulating pattern on the substrate; and partially removing the second preliminary insulating pattern on the cell region to form a second insulating pattern filling a remaining portion of the first trench and a second wiring insulating pattern filling a remaining portion of the second trench, wherein the second preliminary insulating pattern is formed to have an oxygen concentration lower than an oxygen concentration of the first preliminary insulating pattern.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR DEVICE
Publication number
US20260333668A1
Application number
19719008
Filed
Jun 24, 2026
Published
Oct 22, 2026
Inventors
4
Claims
20

Classified under

H10B 12/315 Electricity & electronicsH10B 12/50 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.