Samsung patents 3D memory design with overlapping contacts
Samsung describes a method for building 3D semiconductor memory by stacking two separate circuit structures on a single base. The design uses a second substrate with transistors on one side and a conductive line in an insulating layer on the other, connected by a specific contact point.
In the filing’s own words
A three-dimensional semiconductor memory device includes a first peripheral circuit structure and a second peripheral circuit structure sequentially provided on a first substrate. The second peripheral circuit structure includes a second substrate having a first surface and a second surface facing the first surface, a transistor array including transistors on the first surface of the second substrate, an insulating layer on the second surface of the second substrate, a conductive line extending in the insulating layer in a first direction parallel to the first surface of the second substrate, and a conductive contact between the conductive line and the second surface of the second substrate.
What exactly they claim (claim 1)
1. A three-dimensional semiconductor memory device comprising a first peripheral circuit structure and a second peripheral circuit structure sequentially stacked on a first substrate, wherein the second peripheral circuit structure includes: a second substrate having a first surface and a second surface opposite the first surface; a transistor array including a plurality of transistors on the first surface of the second substrate; an insulating layer on the second surface of the second substrate; a conductive line extending in the insulating layer in a direction parallel to the first surface of the second substrate; and a conductive contact between the conductive line and the second surface of the second substrate.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE WITH OVERLAPPING CONTACTS, AND ELECTRONIC SYSTEM INCLUDING THE SAME
- Publication number
- US20260324515A1
- Application number
- 19546561
- Filed
- Feb 23, 2026
- Published
- Oct 15, 2026
- Inventors
- 4
- Claims
- 20
Classified under
H10W 90/24 Electricity & electronicsH10W 20/2134 Electricity & electronicsH10W 20/43 Electricity & electronicsH10W 20/435 Electricity & electronicsH10W 80/327 Electricity & electronicsH10W 90/26 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.