Samsung patents chip design with new insulation shapes
Samsung has filed a patent for a semiconductor device that uses specific insulation patterns to separate active areas on a chip substrate. The design features gate electrodes that cross these active patterns, with insulation structures placed in the gaps between them to manage electrical isolation.
In the filing’s own words
A semiconductor device includes a substrate having a separation region extending in a first direction. A first active pattern and a second active pattern are disposed on the substrate and spaced apart from each other in a second direction, with the separation region interposed therebetween. First gate electrodes extend in the first direction and cross the first and second active patterns. A first insulation pattern is disposed on the separation region and spaced apart from the first gate electrodes in the second direction. The first insulation pattern includes first extension portions extending in the first direction and spaced apart along the second direction, and a first connection portion disposed between the first extension portions and connecting the first extension portions to each other.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a substrate including a separation region extending in a first direction; a first active pattern and a second active pattern on the substrate, the first active pattern and the second active pattern being spaced apart from each other in a second direction perpendicular to the first direction with the separation region therebetween; first gate electrodes crossing the first active pattern and the second active pattern and extending in the first direction; and a first insulation pattern horizontally spaced apart from the first gate electrodes and provided on the separation region, wherein the first insulation pattern comprises: first extension portions extending in the first direction and spaced apart from each other along the second direction; and a first connection portion provided between the first extension portions and connecting the first extension portions to each other.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- SEMICONDUCTOR DEVICE INCLUDING MULTIPLE INSULATION PATTERNS AND SURROUNDING GATE ELECTRODE
- Publication number
- US20260324062A1
- Application number
- 19374021
- Filed
- Oct 30, 2025
- Published
- Oct 15, 2026
- Inventors
- 3
- Claims
- 20
Classified under
H10D 84/832 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/503 Electricity & electronicsH10D 30/506 Electricity & electronicsH10D 62/151 Electricity & electronicsH10D 64/256 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.