Samsung patents memory chip design with curved contact points
Samsung has filed a patent for a specific layout of components in a semiconductor memory device. The design places a contact point on top of a vertical semiconductor structure, with insulating layers and a capping pattern arranged around it. Both the top of the semiconductor structure and the capping pattern have a curved, concave shape.
In the filing’s own words
A semiconductor device includes: a bit line on a substrate and extending in a first direction parallel to an upper surface of the substrate; a semiconductor pattern on the bit line and extending in a direction perpendicular to the upper surface of the substrate; a gate electrode on a side surface of the semiconductor pattern and extending in a second direction intersecting the first direction; a storage node contact on an upper surface of the semiconductor pattern; an upper insulating layer covering a side surface of the storage node contact; and a capping pattern between the upper insulating layer and the gate electrode. The upper insulating layer is on an upper surface of the capping pattern. The upper surface of the semiconductor pattern and the upper surface the capping pattern each have a concave profile.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a bit line on a substrate and extending in a first direction parallel to an upper surface of the substrate; a semiconductor pattern on the bit line and extending in a direction perpendicular to the upper surface of the substrate; a gate electrode on a side surface of the semiconductor pattern and extending in a second direction intersecting the first direction; a storage node contact on an upper surface of the semiconductor pattern; an upper insulating layer covering a side surface of the storage node contact; and a capping pattern between the upper insulating layer and the gate electrode, wherein the upper insulating layer is on an upper surface of the capping pattern, and wherein the upper surface of the semiconductor pattern and the upper surface of the capping pattern each have a concave profile.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE WITH STORAGE NODE CONTACTS
- Publication number
- US20260323915A1
- Application number
- 19430972
- Filed
- Dec 23, 2025
- Published
- Oct 15, 2026
- Inventors
- 6
- Claims
- 20
Classified under
H10B 12/315 Electricity & electronicsH10B 12/482 Electricity & electronicsH10B 12/0385 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.