Samsung patents memory chip using stacked 2D materials for contacts
Samsung describes a semiconductor memory design where the connections between the data channel and the wiring use stacked layers of two-dimensional materials. These multilayer structures sit between the channel region and the bit lines or electrodes to improve the physical connection.
In the filing’s own words
A semiconductor memory device includes a substrate, word lines which are stacked on the substrate, a channel region which is disposed between the word lines, a first contact structure which is connected to one end of the channel region, a second contact structure which is connected to the other end of the channel region, a bit line which is in contact with the first contact structure, and an electrode structure which is in contact with the second contact structure, wherein the first contact structure includes a two-dimensional semiconductor material layer of multilayers which are stacked between the channel region and the bit line, and the second contact structure includes a two-dimensional semiconductor material layer of multilayers which are stacked between the channel region and the electrode structure.
What exactly they claim (claim 1)
1. A semiconductor memory device comprising: a substrate; word lines on the substrate; a channel region between the word lines; a first contact structure connected to a first end of the channel region; a second contact structure connected to a second end of the channel region; a bit line in contact with the first contact structure; and an electrode structure in contact with the second contact structure, wherein the first contact structure includes first two-dimensional semiconductor material layers forming a first multilayer structure, wherein the first two-dimensional semiconductor material layers are between the channel region and the bit line, and wherein the second contact structure includes second two-dimensional semiconductor material layers forming a second multilayer structure, wherein the second two-dimensional semiconductor material layers are between the channel region and the electrode structure.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR MEMORY DEVICE
- Publication number
- US20260323914A1
- Application number
- 19574707
- Filed
- Mar 23, 2026
- Published
- Oct 15, 2026
- Inventors
- 4
- Claims
- 20
Classified under
H10B 12/30 Electricity & electronicsMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.