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Samsung patents memory chip that tunes its own signal timing

Patent drawing
Patent drawing from the official filing.

Samsung has filed a patent for a memory device that automatically adjusts how it reads commands from a computer. The chip uses a built-in clock divider and selector to find the best moment to sample the 'chip select' signal, ensuring it correctly identifies when it is being addressed.

Why it mattersThis is a routine improvement to memory hardware that helps ensure data is read accurately at high speeds, which is standard practice in modern chip design.

In the filing’s own words

A memory device that performs a training operation on a chip select signal includes a clock divider receiving a clock signal from a host and dividing the clock signal to generate at least two internal clock signals, an internal clock selector receiving the at least two internal clock signals from the clock divider and selecting one of the at least two internal clock signals as a target internal clock signal to sample one of a high level or a low level of the chip select signal, and a sampler receiving the chip select signal from the host, receiving the target internal clock signal from the internal clock selector, and sampling the chip select signal using the target internal clock signal.

What exactly they claim (claim 1)

1. A memory device comprising: a clock divider configured to receive a clock signal from a host, divide the clock signal, and generate at least two internal clock signals; an internal clock selector configured to receive the at least two internal clock signals from the clock divider and select one of the at least two internal clock signals as a target internal clock signal; and a sampler configured to receive a chip select signal from the host, receive the target internal clock signal from the internal clock selector, and sample the chip select signal using the target internal clock signal.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
MEMORY DEVICE PERFORMING CHIP SELECT SIGNAL TRAINING OPERATION AND OPERATION METHOD FOR CHIP SELECT SIGNAL TRAINING
Publication number
US20260321304A1
Application number
19638810
Filed
Apr 3, 2026
Published
Oct 15, 2026
Inventors
4
Claims
20

Classified under

G11C 11/4076 Physics & computingH03L 7/0818 Electricity & electronicsH03L 7/091 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.