Microsoft patents memory counter that splits counting tasks
Microsoft describes a system for counting data in computer memory that splits the job between two parts. One part handles the fast-changing lower digits using a simple circuit, while the other stores the slower-changing upper digits in memory.
In the filing’s own words
A cached random access memory (RAM) counter system includes a plurality of linear feedback shift register (LFSR) counters associated with count values that maintain a unique sequence of bits associated with least-significant bits of a respective count value and a respective carry bit, a RAM circuit that stores a plurality of most-significant bits of each respective count value, a multi-bit multiplexer that receives the unique sequence of bits and the respective carry bit from each of the plurality of LFSR counters and selectively provides the unique sequence of bits and the respective carry bit for the respective count value; and an adder circuit that adds the carry bit output for the respective count value from the multi-bit multiplexer to the plurality of most-significant bits of the respective count value and provides updated most-significant bits of the respective count value for storage in the RAM circuit.
What exactly they claim (claim 1)
1. A cached random-access memory (RAM) counter system comprising: a plurality of linear feedback shift register (LFSR) counters associated with a plurality of count values that each maintain a unique sequence of bits associated with a plurality of least-significant bits of a respective count value and a respective carry bit; a RAM circuit that stores a plurality of most-significant bits of each respective count value; a multi-bit multiplexer that receives the unique sequence of bits and the respective carry bit from each of the plurality of LFSR counters and selectively provides the unique sequence of bits and the respective carry bit for the respective count value; and an adder circuit that adds a carry bit output for the respective count value from the multi-bit multiplexer to the plurality of most-significant bits of the respective count value and provides an updated plurality of most-significant bits of the respective count value for storage in the RAM circuit.
Facts
- Company
- Microsoft (Microsoft Technology Licensing, LLC)
- Official title
- CACHED RANDOM ACCESS MEMORY (RAM) COUNTER SYSTEM
- Publication number
- US20260319954A1
- Application number
- 19720539
- Filed
- Jun 25, 2026
- Published
- Oct 15, 2026
- Inventors
- 3
- Claims
- 20
Classified under
G06F 12/0802 Physics & computingMore from Microsoft in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.