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MicrosoftGranted patentChips & hardwareInterest 6/10

Microsoft patents chip design that guesses code steps ahead

This patent describes a computer chip design that uses a two-step guessing system to predict where software will run next. It combines a fast, small memory with a slower, larger one to keep the processor busy while it waits for instructions.

Why it mattersThis improves how efficiently computer chips process data, which can lead to faster performance in everyday devices like laptops and servers.

In the filing’s own words

Branch target buffer structures are provided. A device can include a hierarchy of branch target buffers storing entries corresponding to branch instructions, the hierarchy of branch target buffers including respective branch target buffers that have progressively slower access times. The device can include a first program counter configured to generate a first program counter value associated with a next instruction of an executing application. The device can include a second program counter configured to predict a second program counter value that is associated with a subsequent instruction of the executing application that is after the next instruction. The device can include first branch prediction circuitry configured to populate a branch target buffer of the branch target buffers based on the second program counter value.

What exactly they claim (claim 1)

1. A device comprising: a hierarchy of branch target buffers storing entries corresponding to branch instructions, the hierarchy of branch target buffers including respective branch target buffers that have progressively slower access times; a first program counter configured to generate a first program counter value associated with a next instruction of an executing application; a second program counter configured to predict a second program counter value that is associated with a subsequent instruction of the executing application that is after the next instruction; and first branch prediction circuitry configured to: populate a branch target buffer of the branch target buffers based on the second program counter value; and set the second program counter to the first program counter value when a compute pipeline that operates based on the first program counter value is stalled.

Facts

Company
Microsoft (Microsoft Technology Licensing, LLC)
Official title
Branch target buffer run-ahead
Patent number
US12730646B2
Application number
18374273
Filed
Sep 28, 2023
Granted
Sep 8, 2026
Inventors
4
Claims
19

Classified under

G06F 9/3806 Physics & computingG06F 9/3808 Physics & computingG06F 9/3844 Physics & computing
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.