Samsung patents memory chips that fix their own command errors
Samsung describes a memory device that uses built-in error correction to fix mistakes in the instructions it receives from a computer. The chip checks the command data for errors using extra parity information and only acts on the command if it is correct.
In the filing’s own words
A memory device includes at least one first pin, a plurality of second pins, a memory interface circuit configured to obtain control information from at least one control signal received from the at least one first pin, obtain data from a plurality of data signals received from the plurality of second pins, and obtain a command and parity information from the control information by interpreting headers included in the control information, a memory cell array configured to store the data, an error correction code (ECC) decoder circuit configured to correct an error of the command based on using the parity information, to generate an error-corrected command, and a control circuit configured to control the memory device based on the error-corrected command in a reset state of a fail flag.
What exactly they claim (claim 1)
1. A memory device comprising: at least one first pin; a plurality of second pins; a memory interface circuit configured to obtain control information from at least one control signal received from the at least one first pin, obtain data from a plurality of data signals received from the plurality of second pins, and obtain a command and parity information from the control information by interpreting headers included in the control information; a memory cell array configured to store the data; an error correction code (ECC) decoder circuit configured to correct an error of the command, using the parity information, to generate an error-corrected command; and a control circuit configured to control the memory device based on the error-corrected command in a reset state of a fail flag.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- MEMORY DEVICE WITH ERROR CORRECTION CODE DECODER CIRCUIT, MEMORY CONTROLLER WITH ERROR CORRECTION CODE CIRCUIT, AND METHOD OF OPERATING MEMORY DEVICE WITH ERROR CORRECTION CODE DECODER CIRCUIT
- Publication number
- US20260319889A1
- Application number
- 19560928
- Filed
- Mar 9, 2026
- Published
- Oct 15, 2026
- Inventors
- 8
- Claims
- 20
Classified under
G06F 11/1068 Physics & computingG06F 11/1048 Physics & computingMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.