Samsung patents chip package with holes to reduce stress
Samsung describes a semiconductor package design that includes empty holes, called dummy holes, in the base substrate. These holes are positioned closer to the edge than the electrical connections, which helps manage physical stress within the chip assembly.
In the filing’s own words
Provided is a semiconductor package including: a package substrate; an interposer substrate on a first surface of the package substrate; a first connection terminal between the package substrate and the interposer substrate; a first semiconductor device on the interposer substrate; and a second semiconductor device on the interposer substrate, wherein the second semiconductor device is spaced apart from the first semiconductor device in a horizontal direction, wherein the package substrate includes a first dummy hole extending in a vertical direction from the first surface of the package substrate, and wherein a distance from an edge of the package substrate adjacent to the first dummy hole is less than a distance from the edge to the first connection terminal.
What exactly they claim (claim 1)
1. A semiconductor package comprising: a package substrate; an interposer substrate on a first surface of the package substrate; a first connection terminal between the package substrate and the interposer substrate; a first semiconductor device on the interposer substrate; and a second semiconductor device on the interposer substrate, wherein the second semiconductor device is spaced apart from the first semiconductor device in a horizontal direction, wherein the package substrate comprises a first dummy hole extending in a vertical direction from the first surface of the package substrate, and wherein a distance from an edge of the package substrate adjacent to the first dummy hole is less than a distance from the edge to the first connection terminal.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- SEMICONDUCTOR PACKAGE WITH STRESS-RELIEF STRUCTURES
- Publication number
- US20260314422A1
- Application number
- 19462161
- Filed
- Jan 28, 2026
- Published
- Oct 8, 2026
- Inventors
- 1
- Claims
- 20
Classified under
H10W 42/121 Electricity & electronicsH10W 74/15 Electricity & electronicsH10W 90/701 Electricity & electronicsMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.