Samsung patents chip package with fluid-cooled internal walls
Samsung describes a semiconductor package design that uses a porous wall to separate two chips while allowing cooling fluid to pass through. This setup lets the liquid directly touch the top surfaces of both chips to remove heat more effectively.
In the filing’s own words
A semiconductor package includes a substrate, a first semiconductor chip on the substrate, a chip stack including at least one second semiconductor chip on the substrate, a molding layer covering a side surface of the first semiconductor chip and a side surface of the chip stack, including a first molding portion between the first semiconductor chip and the chip stack, a separation wall on the first molding portion of the molding layer, defining a first cooling space exposing an upper surface of the first semiconductor chip, and a second cooling space exposing an upper surface of the chip stack, the separation wall including a porous material to allow a cooling fluid to flow through the porous material between the first cooling space and the second cooling space, and the cooling fluid to directly contact the upper surface of the first semiconductor chip and the upper surface of the chip stack.
What exactly they claim (claim 1)
1. A semiconductor package comprising: a substrate; a first semiconductor chip on the substrate; a chip stack comprising at least one second semiconductor chip on the substrate; a molding layer covering a side surface of the first semiconductor chip and a side surface of the chip stack, the molding layer comprising a first molding portion between the first semiconductor chip and the chip stack; a separation wall on the first molding portion of the molding layer, wherein the separation wall defines: a first cooling space exposing an upper surface of the first semiconductor chip; and a second cooling space exposing an upper surface of the chip stack, wherein the separation wall comprises a porous material and is configured to allow a cooling fluid to flow through the porous material between the first cooling space and the second cooling space, and wherein the cooling fluid is configured to directly contact at least a portion of the upper surface of the first semiconductor chip and at least a portion of the upper surface of the chip stack.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR PACKAGE AND COOLING SYSTEM THEREOF
- Publication number
- US20260314414A1
- Application number
- 19716050
- Filed
- Jun 22, 2026
- Published
- Oct 8, 2026
- Inventors
- 6
- Claims
- 20
Classified under
H10W 40/47 Electricity & electronicsH10W 70/611 Electricity & electronicsH10W 74/117 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 90/401 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.