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Samsung patents chip design with built-in lines to spot cracks

Patent drawing
Patent drawing from the official filing.

Samsung describes a semiconductor layout that adds specific metal lines running through the layers of a memory chip. These lines connect the bottom memory section to the top circuit section, creating a path that can be monitored for breaks.

Why it mattersThis design aims to improve the reliability of memory chips by allowing manufacturers or users to detect physical damage before it causes a failure.

In the filing’s own words

A semiconductor device includes a first structure, a second structure on the first structure in a vertical direction, and a crack detection structure. The first structure includes memory cells, cell routing interconnection structures coupled with the memory cells, and a cell insulation structure. The crack detection structure includes a plurality of crack detection lines disposed over the first structure and the second structure and at least partially surrounding the peripheral circuit area. Each of the plurality of crack detection lines includes a lower detection interconnection structure within the cell insulation structure, an upper detection interconnection structure within the peripheral insulation structure, and a detection plug at least partially penetrating through a portion of the peripheral insulation structure, the semiconductor body, the rear insulating layer, and a portion of the cell insulation structure, and coupling the lower detection interconnection structure with the upper detection interconnection structure.

What exactly they claim (claim 1)

1. A semiconductor device, comprising: a first structure comprising memory cells, cell routing interconnection structures coupled with the memory cells, and a cell insulation structure at least partially covering the memory cells and the cell routing interconnection structures; a second structure on the first structure in a vertical direction, at least partially overlapping the first structure, and comprising a peripheral circuit area; and a crack detection structure comprising a plurality of crack detection lines disposed over the first structure and the second structure and at least partially surrounding the peripheral circuit area, wherein crack detection lines of the plurality of crack detection lines are coupled with each other, wherein the second structure comprises: a semiconductor body comprising peripheral active areas; a rear insulating layer below the semiconductor body and bonded to the cell insulation structure; peripheral transistors disposed in the peripheral circuit area and within the peripheral active areas; and a peripheral insulation structure on the semiconductor body and at least partially covering the peripheral transistors, wherein each crack detection line of the plurality of crack detection lines comprises: a lower detection interconnection structure within the cell insulation structure; an upper detection interconnection structure within the peripheral insulation structure; and a detection plug at least partially penetrating through a portion of the peripheral insulation structure, the semiconductor body, the rear insulating layer, and a portion of the cell insulation structure, and coupling the lower detection interconnection structure with the upper detection interconnection structure.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
SEMICONDUCTOR DEVICES HAVING CRACK DETECTION STRUCTURE
Publication number
US20260314338A1
Application number
19562334
Filed
Mar 10, 2026
Published
Oct 8, 2026
Inventors
4
Claims
20

Classified under

H10P 74/273 Electricity & electronicsH10B 12/30 Electricity & electronicsH10B 12/50 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.