Samsung patents chip design using new materials for smaller transistors
Samsung describes an integrated circuit design where the main current-carrying parts, called channel layers, are made from transition metal dichalcogenides (TMDs). The filing details a structure where a gate line wraps around these layers, with specific protective coatings placed between the gate and the channels to control electricity flow.
In the filing’s own words
An integrated circuit device includes a plurality of channel layers extending in a first horizontal direction and including a first channel layer and a second channel layer, a gate line surrounding the plurality of channel layers, wherein the gate line includes a first sub-gate arranged between the first channel layer and the second channel layer, a source/drain pattern arranged on a sidewall of the gate line, and a channel passivation layer including a first passivation layer and a second passivation layer, wherein the first passivation layer is disposed between the first sub-gate and the first channel layer, and the second passivation layer is arranged between the first sub-gate and the second channel layer. The plurality of channel layers protrude in the first horizontal direction from the sidewall of the gate line, and the plurality of channel layers include transition metal dichalcogenides (TMD).
What exactly they claim (claim 1)
1. An integrated circuit device comprising: a plurality of channel layers extending in a first horizontal direction and including a first channel layer and a second channel layer; a gate line extending in a second horizontal direction intersecting the first horizontal direction, and surrounding the plurality of channel layers, the gate line including a first sub-gate arranged between the first channel layer and the second channel layer; a source/drain pattern arranged on a sidewall of the gate line and connected to the plurality of channel layers; and a channel passivation layer including a first passivation layer and a second passivation layer, wherein the first passivation layer is disposed between the first sub-gate and the first channel layer, and the second passivation layer is arranged between the first sub-gate and the second channel layer, wherein the plurality of channel layers protrude in the first horizontal direction from the sidewall of the gate line, and wherein the plurality of channel layers comprise transition metal dichalcogenides (TMD).
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number
- US20260313948A1
- Application number
- 19571748
- Filed
- Mar 19, 2026
- Published
- Oct 8, 2026
- Inventors
- 3
- Claims
- 20
Classified under
H10D 30/6217 Electricity & electronicsH10D 62/117 Electricity & electronicsH10D 86/215 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.