Samsung patents chip part that checks if timing signals are aligned
Samsung describes a circuit that compares two clock signals to ensure they are synchronized. It uses digital codes to adjust the timing of one signal until it matches the other, then signals when they are close enough to be considered locked.
In the filing’s own words
A lock detector including a first digital-to-time converter (DTC) that delays a reference clock based on a first digital code to provide a first delayed clock; a second DTC that delays a target clock based on a second digital code to provide a second delayed clock; a phase difference detection circuit that obtains an error signal indicating a phase relationship between the first delayed clock and the second delayed clock; a calibration circuit that calibrates the first digital code to reduce a phase difference between the first delayed clock and the second delayed clock based on the error signal; and a lock detection circuit that provides a lock detection signal indicating whether the first delayed clock and the second delayed clock are within a set lock detection range.
What exactly they claim (claim 1)
1. A lock detector comprising: a first digital-to-time converter (DTC) configured to delay a reference clock based on a first digital code to provide a first delayed clock; a second DTC configured to delay a target clock based on a second digital code to provide a second delayed clock; a phase difference detection circuit configured to obtain an error signal indicating a phase relationship between the first delayed clock and the second delayed clock; a calibration circuit configured to calibrate the first digital code to reduce a phase difference between the first delayed clock and the second delayed clock based on the error signal; and a lock detection circuit configured to provide a lock detection signal indicating whether the first delayed clock and the second delayed clock are within a set lock detection range.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- LOCK DETECTOR INCLUDING DIGITAL CALIBRATION
- Publication number
- US20260312592A1
- Application number
- 19639955
- Filed
- Apr 6, 2026
- Published
- Oct 8, 2026
- Inventors
- 5
- Claims
- 20
Classified under
H03L 7/095 Electricity & electronicsH03K 3/037 Electricity & electronicsH03L 7/093 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.