Samsung patents method to optimize dummy fill layouts in chip design
Samsung describes a method for improving the design of computer chips by adding filler material, known as dummy fill, to specific areas. The system generates potential filler patterns, predicts how these changes affect the chip's physical properties, and selects the best layout based on those predictions.
In the filing’s own words
A dummy fill layout optimization method includes generating dummy fill candidate patterns corresponding to a target layout, based on data input from a database, predicting a physical property of a layout including the dummy fill candidate patterns, and searching for an optimal dummy fill layout corresponding to the target layout, based on the predicted physical property.
What exactly they claim (claim 1)
1. A dummy fill layout optimization method comprising: generating one or more dummy fill candidate patterns corresponding to a target layout, based on data input from a database; predicting a physical property of a layout including the one or more dummy fill candidate patterns; and searching for an optimal dummy fill layout corresponding to the target layout, based on the predicted physical property.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- DUMMY FILL LAYOUT OPTIMIZATION METHOD AND SYSTEM
- Publication number
- US20260310873A1
- Application number
- 19568139
- Filed
- Mar 16, 2026
- Published
- Oct 8, 2026
- Inventors
- 4
- Claims
- 20
Classified under
G06F 30/392 Physics & computingG06F 30/398 Physics & computingG06F 2111/04 Physics & computingG06F 2111/08 Physics & computingG06F 2111/10 Physics & computingG06F 2111/20 Physics & computingMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.
