/Patent Tracker
GooglePatent applicationChips & hardwareInterest 6/10

Google patents chip manager that balances speed, heat, and power

Patent drawing
Patent drawing from the official filing.

Google describes a system for managing the performance of a system-on-chip (SoC), which is a computer chip that combines multiple functions. A decision module inside the chip receives target values and recommendations, then sends commands to adjust how different parts of the chip operate. This allows the chip to balance performance, temperature, and power usage dynamically.

Why it mattersThis could lead to more efficient devices that stay cooler and last longer by better managing the trade-offs between speed and energy use.

In the filing’s own words

Techniques and apparatuses are described for implementing efficiency-aware performance bounds in system-on-chip (SoC) design. In aspects, a decision module receives one or more target values from a policy coordinator, the one or more target values based on one or more intellectual property (IP) parameters of one or more IP agents. In further aspects, the decision module receives one or more performance state recommendations from one or more processing modules. In some examples, the decision module generates a performance state change command, the performance state change command configured to change the one or more IP performance states of the one or more IP agents. The decision module outputs the performance state change command to the one or more IP agents. In this way, a system-on-chip can dynamically manage multiple operations concerns for the one or more processors, such as balancing performance, temperature, and power concerns to realize a tailored user experience.

What exactly they claim (claim 1)

1. A method performed by a system-on-chip (SoC), the method comprising: receiving, by a decision module and from a policy coordinator, one or more target values, the one or more target values based on one or more intellectual property (IP) parameters of one or more IP agents, the one or more IP parameters based on one or more IP performance states of the one or more IP agents; receiving, by the decision module and from one or more processing modules, one or more performance state recommendations, the one or more performance state recommendations configured to alter the one or more IP performance states; generating, based on the one or more target values and the one or more performance state recommendations, a performance state change command, the performance state change command configured to change the one or more IP performance states of the one or more IP agents; and outputting the performance state change command to the one or more IP agents.

Facts

Company
Google (Google LLC)
Official title
Efficiency-Aware Performance Bounds in SoC Design
Publication number
US20260310855A1
Application number
19169690
Filed
Apr 3, 2025
Published
Oct 8, 2026
Inventors
4
Claims
20

Classified under

G06F 30/27 Physics & computingG06F 30/337 Physics & computingG06F 2119/06 Physics & computingG06F 2119/08 Physics & computing
Read the full filing (official PDF) ↗ Open in the Patent Tracker

More from Google in Chips & hardware

Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.