Samsung patents chip package with tapered connectors for better stacking
Samsung has filed a patent for a semiconductor package that stacks two chips together using a specific connection structure. The design features a connector, or bump, that gets wider as it moves away from the first chip, creating a tapered shape between the two layers.
In the filing’s own words
Provided is a semiconductor package including a first chip substrate including a first surface and a second surface, a through via passing through the first chip substrate, an upper passivation layer including a trench on the second surface of the first chip substrate, the trench exposing at least a portion of the second surface of the first chip substrate, an upper pad electrically connected with the through via on the trench, a second chip substrate including a third surface and a fourth surface, a lower pad electrically connected to the second chip substrate on the third surface of the second chip substrate, and a connection bump electrically connecting the upper pad with the lower pad and contacting the lower pad, wherein a width of the connection bump increases as the connection bump becomes farther away from the first surface of the first chip substrate.
What exactly they claim (claim 1)
1. A semiconductor package comprising: a first semiconductor chip comprising an upper passivation layer having a trench, and an upper pad extending along a bottom surface of the trench and a sidewall of the trench and at least a portion of an upper surface of the upper passivation layer; a second semiconductor chip comprising a lower pad on the first semiconductor chip; a seed layer on the lower pad; and a connection bump between the upper pad and the seed layer, the connection bump connecting the first semiconductor chip with the second semiconductor chip, wherein a width of the connection bump on the first semiconductor chip increases toward a first direction oriented toward the second semiconductor chip from the first semiconductor chip, and wherein a sidewall of the seed layer comprises a portion recessed into the seed layer.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- SEMICONDUCTOR PACKAGE
- Publication number
- US20260305485A1
- Application number
- 19704062
- Filed
- Jun 10, 2026
- Published
- Oct 1, 2026
- Inventors
- 4
- Claims
- 20
Classified under
H10W 90/00 Electricity & electronicsH10W 72/07252 Electricity & electronicsH10W 72/07253 Electricity & electronicsH10W 72/07254 Electricity & electronicsH10W 72/221 Electricity & electronicsH10W 72/234 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.