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SamsungPatent applicationChips & hardwareInterest 4/10

Samsung patents chip stacking method with non-overlapping connections

Samsung describes a way to build integrated circuits by stacking multiple chips on a single base. The chips are placed so their connection points do not overlap, allowing each chip to connect directly to the base without linking to the other chips.

Why it mattersThis manufacturing approach could help engineers pack more components into small electronic devices by organizing chip connections more efficiently.

In the filing’s own words

An integrated circuit having a plurality of stacked chips, and a method of manufacturing thereof are provided. The integrated circuit includes a substrate, a plurality of chips stacked on a printed circuit board, wherein each of the plurality of chips includes a plurality of circuits, and a plurality of interconnects configured to electrically connect each of the plurality of circuits included in the each of the plurality of chips to the substrate, wherein the plurality of chips are unconnected with regard to each other, and are stacked such that areas of each of the plurality of chips, to which the plurality of interconnects are connected, are disposed in a non-overlapping manner with each other.

What exactly they claim (claim 1)

1. An integrated circuit manufacturing method, the method comprising: manufacturing a plurality of chips and stacking the plurality of chips on a substrate; and electrically connecting each of a plurality of circuits comprised in each of the plurality of chips to the substrate with a plurality of interconnects, wherein the manufacturing of the plurality of chips comprises stacking the plurality of chips such that areas of each of the plurality of chips, to which the plurality of interconnects are connected, are disposed in a non-overlapping manner with each other, and wherein the plurality of chips are unconnected with regard to each other.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
MULTI-CHIP STACKING METHOD
Publication number
US20260305468A1
Application number
19574955
Filed
Mar 23, 2026
Published
Oct 1, 2026
Inventors
2
Claims
7

Classified under

H10W 90/00 Electricity & electronicsH10W 20/20 Electricity & electronicsH10W 90/297 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.