Samsung patents chip stacking method using resized connection pads
Samsung describes a way to build semiconductor packages by stacking two chips face-to-face. The process involves drilling a hole through the bottom chip and resizing the opening to create a specific connection pad for the top chip.
In the filing’s own words
A method of manufacturing a semiconductor package including forming a first and second semiconductor chips, arranging the second semiconductor chip on the first semiconductor chip such that bonding pads exposed from a front surface of the second semiconductor chip are bonded to conductive pads exposed from a rear surface of the first semiconductor chip. Forming a first through via having a first diameter that penetrates the first substrate, forming an insulating layer that exposes a first end of the first through via, partially removing the first end of the first through via to a depth from the outer surface of the insulating layer and forming an opening in the insulating layer, and applying a conductive material on an exposed first end of the first through via within the opening to form the conductive pad having a second diameter. A diameter of the opening being different from the first diameter.
What exactly they claim (claim 1)
1. A method of manufacturing a semiconductor package, the method comprising: forming a first semiconductor chip including a first substrate, the first substrate having first and second surfaces opposite to each other; forming a second semiconductor chip including a second substrate, the second substrate having third and fourth surfaces opposite to each other; and arranging the second semiconductor chip on the first semiconductor chip such that a front surface of the second semiconductor chip faces a rear surface of the first semiconductor chip, and bonding pads that are exposed from the front surface of the second semiconductor chip are bonded to conductive pads that are exposed from the rear surface of the first semiconductor chip, wherein the forming the first semiconductor chip includes, forming a first through via that penetrates the first substrate from an activation layer that is formed on the first surface of the first substrate, the first through via having a first diameter; forming an insulating layer that exposes a first end of the first through via on the second surface of the first substrate; partially removing the first end of the first through via to a depth from the outer surface of the insulating layer and forming an opening in the insulating layer, the opening having a bottom surface that exposes the first end of the first through via; and applying a conductive material on the first end of the first through via within the opening of the insulating layer to form the conductive pad that has a second diameter, wherein a diameter of the opening is different from the first diameter of the first through via.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
- Publication number
- US20260305403A1
- Application number
- 19699279
- Filed
- Jun 5, 2026
- Published
- Oct 1, 2026
- Inventors
- 6
- Claims
- 20
Classified under
H10W 70/635 Electricity & electronicsH10P 50/267 Electricity & electronicsH10P 50/667 Electricity & electronicsH10W 20/023 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 72/01333 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.
