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Samsung patents chip layout mixing different-sized logic cells

Patent drawing
Patent drawing from the official filing.

Samsung describes a design for integrated circuits that places standard-sized logic cells next to taller logic cells in adjacent regions. The filing explains how the edges of these taller cells align with the edges of the standard cells to keep the chip layout organized.

Why it mattersThis is a technical improvement in chip manufacturing that could help engineers pack more functionality into processors, though it is not a consumer-facing feature.

In the filing’s own words

Provided is an integrated circuit device include a first logic cell region and a second logic cell region adjacent to one another in a first horizontal direction, a plurality of first logic cells arranged in portions of the first logic cell region and the second logic cell region, each of the plurality of first logic cells having a first cell height, and at least one second logic cell arranged in the other portion of the second logic cell region and having a second cell height greater than the first cell height.

What exactly they claim (claim 1)

1. An integrated circuit device comprising: a first logic cell region and a second logic cell region adjacent to one another in a first horizontal direction; a plurality of first logic cells arranged in portions of the first logic cell region and the second logic cell region, each of plurality of first logic cells having a first cell height; and at least one second logic cell arranged in another portion of the second logic cell region and having a second cell height greater than the first cell height, wherein both ends of the at least one second logic cell in a second horizontal direction substantially orthogonal to the first horizontal direction are aligned, in the first horizontal direction, with one end of both ends in the second horizontal direction of one first logic cell arranged in the first logic cell region among the plurality of first logic cells and another end of both ends in the second horizontal direction of another first logic cell arranged in the first logic cell region among the plurality of first logic cells.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
INTEGRATED CIRCUIT DEVICE
Publication number
US20260304952A1
Application number
19577818
Filed
Mar 25, 2026
Published
Oct 1, 2026
Inventors
5
Claims
20

Classified under

H10D 84/922 Electricity & electronicsH10D 84/931 Electricity & electronicsH10D 84/953 Electricity & electronicsH10D 84/981 Electricity & electronicsH10D 89/10 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.