Samsung patents stacked chip design with stepped insulation layer
Samsung has filed a patent for a semiconductor structure that stacks two layers of active circuit components vertically. The design uses a specific insulation layer with a stepped side surface to separate the upper and lower layers, allowing for more compact chip architecture.
In the filing’s own words
A semiconductor device includes a first active pattern disposed above a substrate and including a plurality of first sheets disposed to be spaced apart from one another, a second active pattern disposed above the first active pattern and including a plurality of second sheets disposed to be spaced apart from one another, a first gate electrode configured to surround the first active pattern, a second gate electrode disposed above the first gate electrode, configured to surround the second active pattern, and an intermediate insulation structure overlapping the first active pattern and the second active pattern and disposed between the first gate electrode and the second gate electrode, and a step is formed on a side surface of the intermediate insulation structure.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a first active pattern disposed above a substrate and comprising a plurality of first sheets disposed to be spaced apart from one another along a first direction crossing a surface of the substrate; a second active pattern disposed above the first active pattern and comprising a plurality of second sheets disposed to be spaced apart from one another along the first direction; a first gate electrode configured to surround the first active pattern and extended along a second direction crossing the first direction; a second gate electrode disposed above the first gate electrode, configured to surround the second active pattern, and extended along the second direction; and an intermediate insulation structure overlapping the first active pattern and the second active pattern along the first direction and disposed between the first gate electrode and the second gate electrode in the first direction, wherein a step is formed on a side surface of the intermediate insulation structure in the second direction.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE INCLUDING ACTIVE PATTERN AND INSULATION STRUCTURE
- Publication number
- US20260304924A1
- Application number
- 19631847
- Filed
- Mar 27, 2026
- Published
- Oct 1, 2026
- Inventors
- 4
- Claims
- 20
Classified under
H10D 84/8311 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/502 Electricity & electronicsH10D 62/121 Electricity & electronicsH10D 62/151 Electricity & electronicsH10D 84/83138 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.