Samsung patents memory chip design using 2D materials to boost durability
Samsung has filed a patent for a ferroelectric memory device that uses a thin, two-dimensional material layer as an insulator between the channel and the ferroelectric layer. This design aims to reduce surface defects in the vertical channels, which helps improve the overall durability and reliability of the memory component.
In the filing’s own words
In a ferroelectric memory device having a vertical channel layer, a 2D material layer, and a ferroelectric layer, the 2D material layer includes an insulating material so that the 2D material layer acts as a gate dielectric layer. The ferroelectric memory device has the 2D material layer between the vertical channel layer and the ferroelectric layer as a gate dielectric layer so as to lessen surface defects of the vertical channel layer, thereby improving durability and reliability.
What exactly they claim (claim 1)
1. A ferroelectric memory device comprising: a source line extending in a first horizontal direction; a plurality of vertical channel layers extending in a vertical direction on the source line; a two-dimensional (2D) material layer having a plurality of first vertical portions surrounding outer walls of the plurality of vertical channel layers and a first horizontal portion connecting upper portions of the plurality of first vertical portions to one another while extending in the first horizontal direction; a ferroelectric layer having a plurality of second vertical portions surrounding outer walls of the plurality of first vertical portions and a second horizontal portion connecting upper portions of the plurality of second vertical portions to one another while extending in the first horizontal direction; a plurality of word lines coming into contact with outer walls of the plurality of second vertical portions of the ferroelectric layer, being spaced apart from one another in the first horizontal direction, and extending in a second horizontal direction that crosses the first horizontal direction; and a bit line coming into contact with the plurality of vertical channel layers and the first horizontal portion of the 2D material layer, and extending in the first horizontal direction.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- FERROELECTRIC MEMORY DEVICE
- Publication number
- US20260304778A1
- Application number
- 19576830
- Filed
- Mar 24, 2026
- Published
- Oct 1, 2026
- Inventors
- 2
- Claims
- 20
Classified under
H10B 51/20 Electricity & electronicsG11C 5/063 Physics & computingH10B 51/30 Electricity & electronicsH10D 30/6728 Electricity & electronicsH10D 30/6733 Electricity & electronicsH10D 30/6735 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.