Samsung patents 3D chip design using air gaps to improve memory performance
Samsung describes a semiconductor device where gate electrodes are stacked with layers of air between them. This structure includes a channel that passes through the stack, with specific insulation layers covering the gates to manage electrical connections.
In the filing’s own words
A semiconductor device according to an embodiment may include a gate stacking structure, a channel structure, and a gate contact. The gate stacking structure may include a plurality of air gap layers and a plurality of gate electrodes alternately stacked to on each other. The channel structure may pass through the gate stacking structure. The channel structure may include a channel layer and a gate dielectric layer. The gate dielectric layer may include a charge storage layer including a plurality of storage portions spaced apart from each other. The plurality of storage portions may correspond to the plurality of gate electrodes, respectively. The gate contact may pass through the gate stacking structure that includes the plurality of air gap layers and the plurality of gate electrodes. The gate contact may be electrically connected to a connection gate electrode of the plurality of gate electrodes.
What exactly they claim (claim 1)
1. A semiconductor device, comprising: a stacking structure including a sacrificial stacking structure and a gate stacking structure; and a channel structure passing through the gate stacking structure, wherein the channel structure includes a channel layer and a gate dielectric layer, the gate dielectric layer includes a charge storage layer including a plurality of storage portions spaced apart from each other, the sacrificial stacking structure includes a first interlayer sacrificial layer and a second interlayer sacrificial layer, the first interlayer sacrificial layer and the second interlayer sacrificial layer include different materials and are alternately stacked on each other, the gate stacking structure includes an air gap layer and a gate structure, in a thickness direction of the stacking structure, the air gap layer corresponds to at least a portion of the first interlayer sacrificial layer and the gate structure corresponds to at least the second interlayer sacrificial layer, the gate structure includes a gate electrode and a cover insulation layer, the cover insulation layer is on the gate electrode and is adjacent to the air gap layer, the cover insulation layer includes a first cover portion extending in a horizontal direction on the gate electrode, and wherein the gate electrode and at least a portion of the first cover portion of the cover insulation layer is disposed to correspond to or overlap the second interlayer sacrificial layer in the thickness direction of the stacking structure.
Facts
- Company
- Samsung (Samsung Electronics Co, Ltd.)
- Official title
- SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
- Publication number
- US20260304759A1
- Application number
- 19361141
- Filed
- Oct 17, 2025
- Published
- Oct 1, 2026
- Inventors
- 9
- Claims
- 20
Classified under
H10B 41/27 Electricity & electronicsH10B 41/35 Electricity & electronicsH10B 43/27 Electricity & electronicsH10B 43/35 Electricity & electronicsH10D 30/0411 Electricity & electronicsH10D 30/0413 Electricity & electronicsMore from Samsung in Chips & hardware
- Samsung patents chip that combines camera and screen Oct 13, 2026
- Samsung patents faster chip testing using machine learning Sep 1, 2026
- Samsung patents radar method to pinpoint target direction more accurately Sep 1, 2026
- Samsung patents memory chip that searches data by content, not address Sep 1, 2026
- Samsung patents chip design that skips empty data to speed up AI Sep 1, 2026
Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.