Samsung patents memory design that trims extra wiring for faster data writes
Samsung describes an embedded memory chip that uses a special switch to connect long, shared data lines to shorter, local lines only when writing data. This setup stacks the main data line above the local one to save space inside the chip.
In the filing’s own words
An embedded memory device includes a bit cell array connected between a bitline and a complementary bitline, a cropping cell connected between the bitline and the complementary bitline, a global bitline connected to the bitline in a write operation, and a complementary global bitline connected to the complementary bitline in the write operation. The global bitline is implemented as an upper metal member. The bitline is implemented as a lower metal member disposed below the upper metal member. The cropping cell is configured to operate in response to a crop wordline signal and, in the write operation, electrically connect the global bitline to the bitline and electrically connect the complementary global bitline to the complementary bitline in response to the crop wordline signal having a first level.
What exactly they claim (claim 1)
1. An embedded memory device comprising: a bit cell array connected between a bitline and a complementary bitline; a cropping cell connected between the bitline and the complementary bitline; a global bitline connected to the bitline in a write operation; and a complementary global bitline connected to the complementary bitline in the write operation, wherein the global bitline is implemented as an upper metal member, wherein the bitline is implemented as a lower metal member disposed below the upper metal member, and wherein the cropping cell is configured to operate in response to a crop wordline signal and, in the write operation, electrically connect the global bitline to the bitline and electrically connect the complementary global bitline to the complementary bitline in response to the crop wordline signal having a first level.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- EMBEDDED MEMORY DEVICE INCLUDING CROPPED BITLINE STRUCTURE AND OPERATING METHOD THEREOF
- Publication number
- US20260301805A1
- Application number
- 19686721
- Filed
- May 24, 2026
- Published
- Oct 1, 2026
- Inventors
- 5
- Claims
- 20
Classified under
G11C 11/418 Physics & computingG11C 5/063 Physics & computingG11C 11/419 Physics & computingMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.