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Samsung patents chip design that adjusts wire thickness for better connections

Samsung has filed a patent for a specific way to build the tiny wires inside computer chips. The design involves stacking metal layers where the lower wire is thicker under one upper wire than under another, creating a structure that does not require traditional connection holes.

Why it mattersThis is a detailed manufacturing technique that could help engineers pack more components into chips while maintaining reliable electrical connections.

In the filing’s own words

An integrated circuit device includes a lower metallization layer including a lower conductive line, and an upper metallization layer stacked on the lower metallization layer and including a first upper conductive line and a second upper conductive line. A thickness of a first portion of the lower conductive line that is overlapped by the second upper conductive line in a first direction is greater than a thickness of a second portion of the lower conductive line that is overlapped by the first upper conductive line in the first direction. Related devices and fabrication methods are also discussed.

What exactly they claim (claim 1)

1. An integrated circuit device comprising: a lower metallization layer comprising a lower conductive line; and an upper metallization layer stacked on the lower metallization layer and comprising a first upper conductive line and a second upper conductive line, wherein a thickness of a first portion of the lower conductive line that is overlapped by the second upper conductive line in a first direction is greater than a thickness of a second portion of the lower conductive line that is overlapped by the first upper conductive line in the first direction.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
INTEGRATED CIRCUIT DEVICES INCLUDING A SELF-ALIGNED VIA-LESS CONTACT STRUCTURE AND METHODS OF FORMING THE SAME
Publication number
US20260293642A1
Application number
19331391
Filed
Sep 17, 2025
Published
Sep 24, 2026
Inventors
5
Claims
20

Classified under

H10W 20/42 Electricity & electronicsH10W 20/063 Electricity & electronicsH10W 20/067 Electricity & electronicsH10W 20/43 Electricity & electronicsH10W 20/435 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.