Samsung patents method for making power chips with internal shielding
Samsung describes a way to build power semiconductors by adding specific shielding areas inside the chip's layers. These areas are created by adding different types of impurities to the semiconductor material during the manufacturing process.
In the filing’s own words
A method of manufacturing a power semiconductor device, includes: forming a lower drift layer of a first conductivity type on a base semiconductor layer, the base semiconductor layer including the first conductivity type; forming shielding regions in upper portions of the lower drift layer by doping with impurities of a second conductivity type different from the first conductivity type, the shielding regions being spaced apart from each other; forming an upper drift layer of the first conductivity type on the lower drift layer and shielding regions; forming source trenches by removing portions of the upper drift layer, the shielding regions, and the lower drift layer; forming a gate trench extending into the upper drift layer; forming a gate electrode in the gate trench; and forming a source electrode on the upper drift layer, the source electrode being spaced apart from the gate electrode.
What exactly they claim (claim 1)
1. A method of manufacturing a power semiconductor device, the method comprising: forming a lower drift layer of a first conductivity type on a base semiconductor layer of the first conductivity type; forming a pair of shielding regions in upper portions of the lower drift layer by doping with impurities of a second conductivity type different from the first conductivity type, the pair of shielding regions being spaced apart from each other; forming an upper drift layer of the first conductivity type on the lower drift layer and the pair of shielding regions; forming a pair of source trenches by removing portions of the upper drift layer, the pair of shielding regions, and the lower drift layer; forming a gate trench extending into the upper drift layer; forming a gate electrode in the gate trench; and forming a source electrode on the upper drift layer, the source electrode being spaced apart from the gate electrode, wherein a horizontal width of the gate trench is equal to or less than a separation distance between the pair of shielding regions.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- METHOD OF MANUFACTURING POWER SEMICONDUCTOR DEVICE INCLUDING SHIELDING REGION
- Publication number
- US20260293230A1
- Application number
- 19655228
- Filed
- Apr 22, 2026
- Published
- Sep 24, 2026
- Inventors
- 2
- Claims
- 20
Classified under
H10D 62/111 Electricity & electronicsH10D 12/031 Electricity & electronicsH10D 30/668 Electricity & electronicsH10D 62/393 Electricity & electronicsH10D 62/8325 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.