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Samsung patents chip design with stacked insulators to separate active areas

This filing describes a method for building a semiconductor chip where specific insulating structures are placed between active areas. It involves creating a two-part separation system that penetrates the gate structure to isolate different parts of the chip from each other.

Why it mattersThis is a detailed manufacturing technique aimed at improving the physical layout of transistors, which is standard work for maintaining chip performance as components shrink.

In the filing’s own words

A semiconductor device includes active regions, including a first active region and a second active region, extending in a first horizontal direction, an isolation region defining the active regions, a gate structure disposed on the isolation region and extending in a second horizontal direction to intersect the active region, and separation structures penetrating through the gate structure and disposed on the isolation region between the first active region and the second active region. The separation structures include a first separation structure extending into the isolation region, and a second separation structure disposed on the first separation structure and penetrating through at least a portion of the first separation structure, and a width of a lower region of the second separation structure in the second horizontal direction is less than a width of an upper region of the first separation structure in the second horizontal direction.

What exactly they claim (claim 1)

1. A method of manufacturing a semiconductor device, the method comprising: forming active regions; forming an isolation region adjacent to side surfaces of the active regions; forming a sacrificial gate structure on the active regions and the isolation region; forming a first opening penetrating through the sacrificial gate structure to expose the isolation region; forming a first separation structure in a lower region of the first opening; removing the sacrificial gate structure to form a gate opening; forming a gate structure in the gate opening and on the first separation structure; forming a second opening penetrating through the gate structure to expose the first separation structure; and forming a second separation structure in the second opening and on the first separation structure.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE AND MULTIPLE INTEGRATED SEPARATION STRUCTURES
Publication number
US20260293208A1
Application number
19694391
Filed
Jun 1, 2026
Published
Sep 24, 2026
Inventors
3
Claims
20

Classified under

H10D 30/6735 Electricity & electronicsH10D 30/021 Electricity & electronicsH10D 30/024 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6757 Electricity & electronicsH10D 62/121 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.