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Samsung patents zigzag memory layout to improve chip density

Samsung describes a new design for semiconductor memory chips that arranges data storage channels in a zigzag pattern. This layout uses specific cutting structures to separate the channels, allowing for a more efficient use of space within the chip.

Why it mattersThis is a technical improvement in chip manufacturing that could help make memory components smaller or more efficient, though it is not visible to end users.

In the filing’s own words

A semiconductor memory device may include a cell substrate, a mold structure including gate electrodes stacked on the cell substrate, a plurality of first and second channel structures extending into the mold structure and being arranged in a zigzag pattern, and a cutting structure disposed between the plurality of first and second channel structures. The cutting structure may include a first portion extending from inside of the first channel structures to inside of the second channel structures in a third direction, the first portion having a line shape having a constant width, and a second portion extending from inside of the second channel structures to inside of the first channel structures in a fourth direction different from the third direction, the second portion having a line shape having a constant width.

What exactly they claim (claim 1)

1. A semiconductor memory device comprising: a cell substrate including a cell region and an extension region; a mold structure including a plurality of gate electrodes sequentially stacked on the cell substrate; a plurality of first channel structures extending into the mold structure, having a sector shape including a first central angle in a plan view, and arranged in a first direction on the cell region; a plurality of second channel structures extending into the mold structure, having a sector shape including a second central angle in a plan view, adjacent to the plurality of first channel structures in a second direction, and arranged in the first direction such that the plurality of first channel structures and the plurality of second channel structures are arranged in a zigzag pattern; and a cutting structure disposed between the plurality of first channel structures and the plurality of second channel structures, wherein the cutting structure includes: a first portion extending from inside of the plurality of first channel structures to inside of the plurality of second channel structures in a third direction, the first portion having a line shape having a constant width in a first width direction perpendicular to the third direction; and a second portion extending from inside of the plurality of second channel structures to inside of the plurality of first channel structures in a fourth direction different from the third direction, the second portion having a line shape having a constant width in a second width direction perpendicular to the fourth direction.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
Publication number
US20260293136A1
Application number
19682644
Filed
May 20, 2026
Published
Sep 24, 2026
Inventors
2
Claims
1

Classified under

H10B 43/27 Electricity & electronicsG11C 16/0483 Physics & computingH10B 43/10 Electricity & electronicsH10B 43/35 Electricity & electronicsH10B 43/40 Electricity & electronicsH10B 80/00 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.