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Samsung patents memory chip design with a specific contact shape

The filing describes a structure for semiconductor memory cells, which store data in chips. It details how a vertical semiconductor pillar connects to a storage node through a contact pattern that includes a horizontal section to create a recessed area.

Why it mattersThis is a routine improvement to the physical layout of memory chips, likely aimed at optimizing how electrical connections are made within the device.

In the filing’s own words

A semiconductor memory device comprises a substrate, a word line extending in a first direction parallel to a top surface of the substrate, a semiconductor pattern having a long axis in a second direction intersecting the first direction and penetrating the word line, a gate insulating layer between the word line and the semiconductor pattern, a bit line extending in a third direction perpendicular to the top surface of the substrate and connected to a first end of the semiconductor pattern, a storage node electrode connected to a second end opposite to the first end of the semiconductor pattern, a contact pattern interposed between the storage node electrode and the second end of the semiconductor pattern, wherein the contact pattern can comprise a contact portion contacting the semiconductor pattern and a horizontal portion extending from the contact portion in the second direction to define a recess region.

What exactly they claim (claim 1)

1. A semiconductor memory device comprising: a substrate; a word line extending in a first direction parallel to a top surface of the substrate; a semiconductor pattern penetrating the word line and comprising a long axis in a second direction intersecting the first direction; a gate insulating layer between the word line and the semiconductor pattern; a bit line extending in a third direction perpendicular to the top surface of the substrate and connected to a first end of the semiconductor pattern; a storage node electrode connected to a second end opposite the first end of the semiconductor pattern; and a contact pattern between the storage node electrode and the second end of the semiconductor pattern, wherein the contact pattern comprises a contact portion contacting the semiconductor pattern and a horizontal portion extending from the contact portion in the second direction to define a recess region.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
SEMICONDUCTOR MEMORY DEVICE
Publication number
US20260293121A1
Application number
19421508
Filed
Dec 16, 2025
Published
Sep 24, 2026
Inventors
4
Claims
20

Classified under

H10B 12/488 Electricity & electronicsH10B 12/482 Electricity & electronicsH10D 1/714 Electricity & electronicsH10D 62/60 Electricity & electronicsH10B 12/05 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.