Samsung patents chip package design with layered protection for better connections
Samsung describes a semiconductor package design that uses a specific arrangement of metal and insulating layers to connect a chip to external terminals. The structure includes a barrier layer and protection layer that cover the conductive paths to shield them and ensure stable electrical contact. This design helps manage how signals and power move between the chip and the rest of the device.
In the filing’s own words
A semiconductor package according to the disclosure includes a terminal, a conductive pattern connected to the terminal, a barrier layer covering a top surface and a first side wall of the conductive pattern, an insulating layer surrounding the barrier layer, a protection layer covering a bottom surface of the insulating layer and a bottom surface of the barrier layer, a redistribution pattern connected to the barrier layer, a semiconductor chip electrically connected to the redistribution pattern, and a molding layer surrounding the semiconductor chip. A top surface of the protection layer includes a first portion contacting the conductive pattern, and a second portion contacting the barrier layer.
What exactly they claim (claim 1)
1. A semiconductor package comprising: a redistribution structure; a semiconductor chip on the redistribution structure and electrically connected to the redistribution structure; a terminal connected to the redistribution structure; and a molding layer on the redistribution structure and surrounding the semiconductor chip, wherein the redistribution structure comprises, a conductive pattern connected to the terminal; a barrier layer covering a top surface and a first side wall of the conductive pattern; an insulating layer surrounding the barrier layer; a protection layer covering a bottom surface of the insulating layer and a bottom surface of the barrier layer; and a redistribution pattern including a redistribution barrier layer contacting the barrier layer and a redistribution conductive layer on the redistribution barrier layer, wherein the conductive pattern has a first portion contacting a side surface of the barrier layer, a second portion contacting a first side surface of the protection layer, and a step portion between the first portion and the second portion.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
- Publication number
- US20260283048A1
- Application number
- 19668355
- Filed
- May 5, 2026
- Published
- Sep 17, 2026
- Inventors
- 3
- Claims
- 20
Classified under
H10W 90/701 Electricity & electronicsH10W 70/685 Electricity & electronicsH10W 74/131 Electricity & electronicsH10W 74/15 Electricity & electronicsH10W 90/00 Electricity & electronicsH10W 90/724 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.