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Samsung patents stacked chip design with uneven adhesive layers

Samsung describes a method for building semiconductor packages by stacking multiple chips on top of each other. The design uses adhesive films that stick out beyond the edges of the chips, with the bottom layers extending further outward than the top layer to create a specific structural shape.

Why it mattersThis filing details a specific manufacturing technique for stacking chips, which could help improve how processors are assembled, though it does not describe a new consumer product.

In the filing’s own words

A semiconductor package includes first semiconductor chips electrically connected to each other through a through-via electrically connecting a first front surface pad and a first rear surface pad. A second semiconductor chip has a second lower surface including a second front surface pad, a second upper surface, a second side surface extending from the second upper surface, and a recess surface extending from the second lower surface to the second side surface. First adhesive films are on a first lower surface of first semiconductor chips and include first extension portions extending further outwardly than a first side surface of the first semiconductor chips. A second adhesive film is on the second lower surface and includes a second extension portion extending further outwardly than the second side surface. In a horizontal direction, a length of the second extension portion is less than a length of each of the first extension portions.

What exactly they claim (claim 1)

1. A method for manufacturing a semiconductor package comprising: forming a semiconductor wafer including a plurality of first semiconductor chips divided by a scribe lane; forming a recess portion between the plurality of first semiconductor chips along the scribe lane; cutting the semiconductor wafer along the scribe lane so that the plurality of first semiconductor chips are separated from each other, wherein each of the plurality of first semiconductor chips has a recess surface including a horizontal surface and a vertical surface; bonding one of the plurality of first semiconductor chips onto a top of a plurality of second semiconductor chips with a first adhesive film interposed therebetween, wherein the plurality of second semiconductor chips are stacked on a base wafer with a second adhesive film interposed between adjacent ones of the plurality of second semiconductor chips or between the plurality of second semiconductor chips and the base wafer; forming an encapsulant covering the plurality of first semiconductor chips and the plurality of second semiconductor chips; and separating a semiconductor package including the one of the plurality of first semiconductor chips and the plurality of second semiconductor chips, wherein the first adhesive film has a first extension portion extending further outwardly than a first side surface of the one of the plurality of first semiconductor chips, wherein the second adhesive film has a second extension portion extending further outwardly than a second side surface of each of the plurality of second semiconductor chips, and wherein, in a horizontal direction, a length of the first extension portion is less than a length of the second extension portion.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
SEMICONDUCTOR PACKAGE
Publication number
US20260283036A1
Application number
19675735
Filed
May 13, 2026
Published
Sep 17, 2026
Inventors
3
Claims
20

Classified under

H10W 90/00 Electricity & electronicsH10W 72/20 Electricity & electronicsH10W 72/30 Electricity & electronicsH10W 72/851 Electricity & electronicsH10W 72/07352 Electricity & electronicsH10W 72/07353 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.