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Samsung patents chip layer design with mixed insulating materials

Samsung has filed a patent for a semiconductor device that uses a specific arrangement of insulating layers to connect different parts of a chip. The design features an intermediate layer made of two different materials, where one material has a higher dielectric constant than the other, to help manage electrical signals between upper and lower structures.

Why it mattersThis is a detailed technical improvement to how chip layers are stacked, which could help engineers build more efficient or compact processors, though it is a routine aspect of chip manufacturing.

In the filing’s own words

A semiconductor device includes a lower structure; an intermediate insulating structure on the lower structure; an intermediate interconnection structure penetrating through the intermediate insulating structure; an upper insulating structure on the intermediate insulating structure and the intermediate interconnection structure; and an upper conductive pattern penetrating through the upper insulating structure and electrically connected to the intermediate interconnection structure, wherein the intermediate insulating structure includes an intermediate etch-stop layer and an intermediate insulating layer thereon, the intermediate insulating layer includes first and second intermediate material layers, the second intermediate material layer having an upper surface coplanar with an upper surface of the first intermediate material layer, the intermediate interconnection structure penetrates through the first intermediate material layer and the intermediate etch-stop layer, and a material of the first intermediate material layer has a dielectric constant that is higher than a dielectric constant of a material of the second intermediate material layer.

What exactly they claim (claim 1)

1 - 20. (canceled)

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR DEVICE INCLUDING INTERCONNECTION STRUCTURE
Publication number
US20260282861A1
Application number
19669046
Filed
May 6, 2026
Published
Sep 17, 2026
Inventors
6
Claims
21

Classified under

H10W 20/075 Electricity & electronicsH10B 12/315 Electricity & electronicsH10W 20/056 Electricity & electronicsH10W 20/089 Electricity & electronicsH10W 20/42 Electricity & electronicsH10W 20/425 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.