Samsung patents stacked transistor design with shared contacts
Samsung describes a 3D transistor structure where two layers of source/drain regions are stacked with opposite electrical properties. The design uses a shared contact to link the upper and lower layers, reducing the need for separate connections.
In the filing’s own words
A three-dimensional (3D) transistor structure includes a first stacked transistor structure including a first lower source/drain (S/D) region and a first upper S/D region stacked thereon with an insulating layer therebetween. The first lower S/D region has a first conductivity type, and the first upper S/D region has a second conductivity type that is opposite to the first conductivity type. A first contact is connected to the first upper S/D region, and a second contact is connected to the first lower S/D region. A shared contact connects the first upper S/D region to the first lower S/D region. Related devices and fabrication methods are also discussed.
What exactly they claim (claim 1)
1. A three-dimensional (3D) transistor structure, comprising: a first stacked transistor structure comprising a first lower source/drain (S/D) region and a first upper S/D region stacked thereon with an insulating layer therebetween, wherein the first lower S/D region has a first conductivity type, and the first upper S/D region has a second conductivity type that is opposite to the first conductivity type; and a first contact connected to the first upper S/D region; a second contact connected to the first lower S/D region; and a shared contact connecting the first upper S/D region to the first lower S/D region.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- DIODE STRUCTURES OF STACKED TRANSISTORS AND METHODS OF MANUFACTURING THE SAME
- Publication number
- US20260282559A1
- Application number
- 19297571
- Filed
- Aug 12, 2025
- Published
- Sep 17, 2026
- Inventors
- 6
- Claims
- 21
Classified under
H10D 89/611 Electricity & electronicsH10D 84/017 Electricity & electronicsH10D 84/0186 Electricity & electronicsH10D 84/851 Electricity & electronicsH10D 84/856 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.