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Samsung patents chip design with two different gate structures

Samsung describes a method for making a chip that uses two distinct gate structures on the same surface. The process involves creating patterns of different thicknesses and widths to control how the chip's transistors behave.

Why it mattersThis is a technical improvement in chip manufacturing that could help make computer components more efficient or compact.

In the filing’s own words

A semiconductor device includes first and second sheet patterns spaced apart from each other on a first region of the substrate, a first gate electrode extending between the first and second sheet patterns, third and fourth sheet patterns spaced apart from each other on a second region of the substrate, and a second gate electrode extending between the third and fourth sheet patterns. The first gate electrode includes a first work function controlling film, which is between the first and second sheet patterns, and a first filling conductive film on the first work function controlling film. The second gate electrode includes a second work function controlling film, which is between the third and fourth sheet patterns, and a second filling conductive film on the second work function controlling film. A distance between the third and fourth sheet patterns is greater than a distance between the first and second sheet patterns.

What exactly they claim (claim 1)

1. A method for manufacturing a semiconductor device, comprising: forming a first sheet pattern on a first region of a substrate, and a second sheet pattern on a second region of the substrate; forming a first preliminary oxide layer along a periphery of the first sheet pattern; performing a first oxidation process to form a first oxide layer along the periphery of the first sheet pattern and a second oxide layer along a periphery of the second sheet pattern; removing the first oxide layer and the second oxide layer to expose the first sheet pattern and the second sheet pattern; and forming a first gate structure on the exposed first sheet pattern and a second gate structure on the exposed second sheet pattern, wherein a thickness of the exposed first sheet pattern is greater than a thickness of the exposed second sheet pattern, and wherein a width of the exposed first sheet pattern is greater than a width of the exposed second sheet pattern.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Publication number
US20260282526A1
Application number
19666580
Filed
May 4, 2026
Published
Sep 17, 2026
Inventors
6
Claims
20

Classified under

H10D 84/83 Electricity & electronicsH10D 30/014 Electricity & electronicsH10D 30/031 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6739 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.