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Samsung patents chip method using connectors on the back of the silicon

Samsung describes a way to build a semiconductor chip by creating a hole that goes through the top layer of the device. This hole connects to a metal contact on the opposite side of the chip, allowing electrical signals to pass from the back of the silicon wafer.

Why it mattersThis technique could help engineers pack more components into chips by using the back side of the silicon for connections, which is a common goal in making faster and smaller processors.

In the filing’s own words

A method of manufacturing a semiconductor device includes forming a source/drain pattern and a channel pattern on an upper surface of a substrate, forming a through pattern extending through the source/drain pattern, forming an active contact on the through pattern, and forming a buried connector on a bottom surface of the substrate, where the upper surface and the bottom surface of the substrate are opposite each other and the buried connector is formed to be connected to the through pattern.

What exactly they claim (claim 1)

1. A method of manufacturing a semiconductor device, comprising: forming a source/drain pattern and a channel pattern on an upper surface of a substrate; forming a through pattern extending into the source/drain pattern; forming an active contact on the through pattern; and forming a buried connector on a bottom surface of the substrate, wherein the upper surface and the bottom surface of the substrate are opposite each other, and wherein the buried connector is formed to be connected to the through pattern.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO, LTD.)
Official title
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING BURIED CONNECTOR
Publication number
US20260282491A1
Application number
19667077
Filed
May 4, 2026
Published
Sep 17, 2026
Inventors
5
Claims
20

Classified under

H10D 64/258 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6729 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6757 Electricity & electronicsH10D 62/121 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.