Samsung patents chip design with buried wiring for better connections
Samsung describes a semiconductor structure where a conductive path is buried beneath the gate electrode to connect different parts of the transistor. This design uses two different insulating materials to separate the active components, potentially improving how electrical signals move through the chip.
In the filing’s own words
A semiconductor device includes a first fin-shaped pattern extending in a first horizontal direction, a second fin-shaped pattern extending in the first horizontal direction, a field insulating film between the first fin-shaped pattern and the second fin-shaped pattern, a gate electrode extending on the first fin-shaped pattern, the second fin-shaped pattern and the field insulating film, the gate electrode extending in a second horizontal direction crossing the first horizontal direction, a first source/drain pattern on the first fin-shaped pattern, a second source/drain pattern on the second fin-shaped pattern, and a first source/drain contact on the first source/drain pattern, wherein the field insulating film includes a first field stop film and a first field filling film on the first field stop film, and wherein the first field stop film includes a material different from that of the first field filling film.
What exactly they claim (claim 1)
1. A semiconductor device comprising: a first fin-shaped pattern extending in a first horizontal direction; a second fin-shaped pattern extending in the first horizontal direction; a field insulating film between the first fin-shaped pattern and the second fin-shaped pattern; a gate electrode extending on the first fin-shaped pattern, the second fin-shaped pattern and the field insulating film, the gate electrode extending in a second horizontal direction crossing the first horizontal direction; a first source/drain pattern on the first fin-shaped pattern; a second source/drain pattern on the second fin-shaped pattern; a first source/drain contact on the first source/drain pattern; a buried conductive pattern extending in the first horizontal direction and connected to the first source/drain contact, the buried conductive pattern below the gate electrode and between the first fin-shaped pattern and the second fin-shaped pattern; and a rear wiring line connected to a bottom surface of the buried conductive pattern, wherein the field insulating film includes a first field stop film and a first field filling film on the first field stop film, and wherein the first field stop film includes a material different from that of the first field filling film.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- SEMICONDUCTOR DEVICE
- Publication number
- US20260282443A1
- Application number
- 19666520
- Filed
- May 4, 2026
- Published
- Sep 17, 2026
- Inventors
- 2
- Claims
- 20
Classified under
H10D 30/6729 Electricity & electronicsH10D 30/43 Electricity & electronicsH10D 30/6735 Electricity & electronicsH10D 30/6757 Electricity & electronicsH10D 62/121 Electricity & electronicsH10D 62/151 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.