Samsung patents memory chip design with angled contact holes
Samsung has filed a patent for a semiconductor memory device that features a specific shape for the electrical connection between the bit line and the active area of the chip. The design uses a contact hole that tapers inward as it goes deeper, with a straight-line slope that extends below the surface layer separating the active areas.
In the filing’s own words
A semiconductor memory device includes a substrate including an active area defined by an element separation layer, the active area including a first portion and second portions defined on both sides of the first portion a bit line crossing the active area and extending in a first direction on the substrate, and a bit line contact disposed between the substrate and the bit line and directly connected to the first portion of the active area. The bit line contact includes an indent area recessed into the substrate and an upper area on the indent area, a width of the indent area decreases as a distance from the bit line increases, the indent area includes a slope forming a boundary with the substrate and having a straight line shape, and a starting point of the slope of the indent area is lower than an upper surface of the element separation layer.
What exactly they claim (claim 1)
1. A semiconductor memory device, comprising: a substrate comprising an active area defined by an element separation layer, wherein the active area comprises a first portion and second portions defined on both sides of the first portion; a bit line crossing the active area and extending in a first direction on the substrate; and a bit line contact disposed between the substrate and the bit line and directly connected to the first portion of the active area, wherein the bit line contact comprises an indent area recessed into the substrate and an upper area on the indent area, a width of the indent area of the bit line contact decreases as a distance from the bit line increases, the indent area of the bit line contact comprises a slope forming a boundary with the substrate and having a substantially straight line shape, a starting point of the slope of the indent area is lower than an upper surface of the element separation layer, and wherein the upper area of the bit line contact comprises a portion having a width that increases in a second direction different from the first direction as the distance from the bit line increases.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number
- US20260282326A1
- Application number
- 19672032
- Filed
- May 8, 2026
- Published
- Sep 17, 2026
- Inventors
- 5
- Claims
- 1
Classified under
H10B 12/315 Electricity & electronicsG11C 5/063 Physics & computingH10B 12/31 Electricity & electronicsH10B 12/34 Electricity & electronicsH10B 12/482 Electricity & electronicsH10B 12/485 Electricity & electronicsMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.