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Samsung patents memory layout with extra wiring between cells

Samsung has filed a patent for a specific arrangement of memory cells in a chip. The design adds a 'strap circuit' between vertically stacked memory cells and splits the data lines into three smaller sub-lines to connect them.

Why it mattersThis is a detailed engineering tweak to how data moves through memory chips, likely aimed at improving signal stability or density in future processors.

In the filing’s own words

A memory device includes a memory cell array including memory cells arranged in a matrix, the memory cell array including a first memory cell and a second memory cell arranged in a column direction, a first bitline and a second bitline connected to the first memory cell and the second memory cell, and a strap circuit provided between the first memory cell and the second memory cell. Each of the first and second bitlines includes a first sub-bitline connected to the strap circuit and the first memory cell, a second sub-bitline connected to the strap circuit and the second memory cell, and a third sub-bitline connected to the strap circuit through the first sub-bitline.

What exactly they claim (claim 1)

1. A memory device comprising: a memory cell array comprising memory cells arranged in a matrix, the memory cell array comprising a first memory cell and a second memory cell arranged in a column direction; a first bitline and a second bitline connected to the first memory cell and the second memory cell; and a strap circuit between the first memory cell and the second memory cell, wherein each of the first and second bitlines comprises a first sub-bitline connected to the strap circuit and the first memory cell, a second sub-bitline connected to the strap circuit and the second memory cell, and a third sub-bitline connected to the strap circuit through the first sub-bitline.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR MEMORY DEVICE WITH STRAP ELEMENT
Publication number
US20260282314A1
Application number
19543519
Filed
Feb 18, 2026
Published
Sep 17, 2026
Inventors
4
Claims
20

Classified under

H10B 10/125 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.