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Samsung patents plasma chamber timing for chip manufacturing

Samsung has filed a patent for a method to control the electrical voltage used in a plasma chamber during chip manufacturing. The system applies a specific non-sinusoidal wave pattern where the negative voltage phase lasts for no more than 20% of the total cycle. This precise timing helps manage how ions interact with the wafer during processing.

Why it mattersThis is a routine improvement in semiconductor manufacturing equipment that helps maintain consistent quality in chip production.

In the filing’s own words

A substrate processing device includes: a chamber; a lower electrode structure in the chamber and configured to support a substrate; an upper electrode structure in the chamber and configured to generate plasma; a plasma voltage supply device configured to apply a plasma voltage to the upper electrode structure; and a bias voltage supply device configured to apply, to the lower electrode structure, a bias voltage having a voltage waveform of a non-sinusoidal wave and including a pulse period having a positive bias voltage, a ramp period having a negative bias voltage, a first transition period changed from the pulse period to the ramp period, and a second transition period changed from the ramp period to the pulse period, in which a length of a negative voltage period having the negative bias voltage in a period of the voltage waveform is at most 20% of a length of the period.

What exactly they claim (claim 1)

1. A substrate processing device comprising: a chamber comprising a processing space; a lower electrode structure arranged in the processing space, and configured to support a substrate; an upper electrode structure arranged to face the lower electrode structure, and configured to generate plasma in the processing space; a plasma voltage supply device configured to apply a plasma voltage to the upper electrode structure; a bias voltage supply device configured to apply a bias voltage to the lower electrode structure; and a control device configured to control an operation of the plasma voltage supply device and an operation of the bias voltage supply device, wherein the bias voltage supply device is configured to apply, to the lower electrode structure, the bias voltage having a voltage waveform of a non-sinusoidal wave, the bias voltage comprising a pulse period having a positive bias voltage, a ramp period having a negative bias voltage, a first transition period changed from the pulse period to the ramp period, and a second transition period changed from the ramp period to the pulse period, in which a length of a negative voltage period having the negative bias voltage in a period of the voltage waveform is at most 20% of a length of the period.

Facts

Company
Samsung (SAMSUNG ELECTRONICS CO., LTD.)
Official title
VOLTAGE WAVEFORM CONTROLLING METHOD, SUBSTRATE PROCESSING METHOD, AND SUBSTRATE PROCESSING APPARATUS
Publication number
US20260279728A1
Application number
19680466
Filed
May 18, 2026
Published
Sep 17, 2026
Inventors
9
Claims
1

Classified under

H01J 37/32128 Electricity & electronicsH01J 37/32146 Electricity & electronicsH01J 37/3299 Electricity & electronicsH01J 2237/3346 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.