Samsung patents memory chip design that shares a reference line for different cell types
Samsung describes a memory device that combines standard rewritable cells with one-time programmable (OTP) cells in the same chip. The design uses a shared electrical line to provide reference signals for both cell types, allowing a single amplifier to compare data from either area.
In the filing’s own words
A memory device includes a controller configured to generate a control signal based on a type of a memory cell, to perform a read operation of the memory device, a cell array including a normal memory area including a normal memory cell capable of multiple programming, a one-time programmable (OTP) memory area including an OTP memory cell capable of one-time programming, a normal reference area including a normal reference cell corresponding to the normal memory cell, and an OTP reference area including an OTP reference cell corresponding to the OTP memory cell, and a sense amplifier configured to generate a comparison signal by detecting a difference between an input signal applied from the memory cell and a reference signal applied from the reference cell. The normal reference cell and the OTP reference cell are configured to share a target reference bit line.
What exactly they claim (claim 1)
1. A memory device comprising: a controller configured to generate, based on a type of memory cell, a control signal to perform a read operation of the memory device; a cell array comprising: a normal memory area including a normal memory cell for multiple programming, a one-time programmable (OTP) memory area including an OTP memory cell capable of one-time programming, a normal reference area including a normal reference cell corresponding to the normal memory cell, and an OTP reference area including an OTP reference cell corresponding to the OTP memory cell; and a sense amplifier configured to generate a comparison signal based on a difference between an input signal from the memory cell and a reference signal from the reference cell, wherein the normal reference cell and the OTP reference cell are configured to share a target reference bit line.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE
- Publication number
- US20260279423A1
- Application number
- 19552269
- Filed
- Feb 27, 2026
- Published
- Sep 17, 2026
- Inventors
- 3
- Claims
- 20
Classified under
G11C 11/1673 Physics & computingG11C 11/161 Physics & computingG11C 11/1655 Physics & computingG11C 11/1659 Physics & computingG11C 17/18 Physics & computingG11C 11/1657 Physics & computingMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.