Samsung patents chip design that splits AI tasks between two parts
Samsung describes a processor design where a dedicated unit handles part of the data for AI tasks, while a separate unit handles the rest. These two parts are stacked together and connected by tiny wires to work as one system.
In the filing’s own words
An electronic device is provided. The electronic device includes volatile memory and at least one processor communicatively coupled to the volatile memory, wherein the at least one processor includes a first die including a neural processing unit (NPU) circuit, a second die including cache memory and direct memory access (DMA) controller for data communication between the cache memory and the volatile memory, and a bus interface including through silicon vias (TSVs) provided between the first die and the second die. The at least one DMA processor configured to perform an operation on a portion of data related to a neural network, and transmit the remaining portion to the NPU circuit of the first die through the bus interface in order to perform an operation of the NPU circuit for the remaining portion of the data different from the portion.
What exactly they claim (claim 1)
1. A mobile communication device comprising: processing circuitry; memory, comprising one or more storage media, storing instructions; and at least one direct memory access (DMA) processor positioned outside the processing circuitry communicatively coupled to the processing circuitry and the memory, wherein the at least one DMA processor is configured to: when controlled by the processing circuitry, perform a first computation, among first data and second data, with respect to the first data, and transmit a result of the first computation to the processing circuitry or the memory, and wherein the processing circuitry is configured to: perform a second computation with respect to the result of the first computation or the second data, and transmit a result of the second computation to the memory.
Facts
- Company
- Samsung (Samsung Electronics Co., Ltd.)
- Official title
- INTEGRATED CIRCUIT INCLUDING DIRECT MEMORY ACCESS CIRCUIT FOR DISTRIBUTED OPERATION AND ELECTRONIC DEVICE INCLUDING SAME
- Publication number
- US20260277834A1
- Application number
- 19665366
- Filed
- May 1, 2026
- Published
- Sep 17, 2026
- Inventors
- 2
- Claims
- 20
Classified under
G06F 13/28 Physics & computingG06F 2213/28 Physics & computingMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.