Samsung patents chip circuit that slows down when power dips
Samsung describes a clock supply circuit that monitors its own power supply using a delay line to detect sudden voltage drops, known as droop. If a drop is detected, the circuit automatically switches to a lower-frequency clock signal to keep the device running stably.
In the filing’s own words
A clock supply circuit includes: a delay line to which a voltage is supplied from a supply voltage line; a clock signal output circuit configured to output one of a first clock signal or a second clock signal corresponding to an input clock signal to a device based on a flag signal, wherein the first clock signal having a first frequency and the second clock signal having a second frequency; a droop detection circuit configured to output the flag signal to the clock signal output circuit, the flag signal indicating whether a droop is detected for the voltage based on a propagation degree of the first clock signal in the delay line; and a droop mitigation circuit configured to output an output selection signal for the delay line to the clock signal output circuit to control the second frequency of the second clock signal.
What exactly they claim (claim 1)
1. A clock supply circuit comprising: a delay line to which a voltage is supplied from a supply voltage line; a clock signal output circuit configured to output one of a first clock signal or a second clock signal corresponding to an input clock signal to a device based on a flag signal, wherein the first clock signal having a first frequency and the second clock signal having a second frequency; a droop detection circuit configured to output the flag signal to the clock signal output circuit, the flag signal indicating whether a droop is detected for the voltage based on a propagation degree of the first clock signal in the delay line; and a droop mitigation circuit configured to output an output selection signal for the delay line to the clock signal output circuit to control the second frequency of the second clock signal.
Facts
- Company
- Samsung (SAMSUNG ELECTRONICS CO., LTD.)
- Official title
- VOLTAGE DROOP DETECTION AND MITIGATION CIRCUIT SHARING DELAY LINE, AND CLOCK SUPPLY CIRCUIT INCLUDING THE SAME
- Publication number
- US20260277291A1
- Application number
- 19566397
- Filed
- Mar 13, 2026
- Published
- Sep 17, 2026
- Inventors
- 2
- Claims
- 20
Classified under
G06F 1/305 Physics & computingG06F 1/324 Physics & computingMore from Samsung in Chips & hardware
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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.