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Samsung patents stacked memory chip design with exposed trench isolation

Samsung describes a semiconductor device where a memory cell structure sits beneath a peripheral circuit structure. The peripheral circuit includes a substrate with doped regions, transistors, and a trench isolation layer that is exposed by a passivation layer.

Why it mattersThis filing details a specific manufacturing layout for memory chips, which could affect how future storage components are built and connected.

In the filing’s own words

A semiconductor device includes a memory cell structure and a peripheral circuit structure arranged on the memory cell structure. The peripheral circuit structure includes a first substrate including at least one substrate region doped with impurities, a peripheral circuit transistor arranged on the at least one substrate region, a peripheral circuit wire layer electrically connected to the peripheral circuit transistor, a passivation layer arranged on the at least one substrate region, and a trench isolation layer penetrating the at least one substrate region, and the passivation layer exposes the trench isolation layer.

What exactly they claim (claim 1)

1. A semiconductor device comprising: a memory cell structure; and a peripheral circuit structure on the memory cell structure, wherein the peripheral circuit structure comprises a first substrate comprising at least one substrate region doped with impurities, a peripheral circuit transistor on the at least one substrate region, a peripheral circuit wire layer electrically connected to the peripheral circuit transistor, a passivation layer on the at least one substrate region, and a trench isolation layer extending into the at least one substrate region, and wherein the passivation layer exposes the trench isolation layer.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Publication number
US20260271798A1
Application number
19551802
Filed
Feb 27, 2026
Published
Sep 10, 2026
Inventors
2
Claims
20

Classified under

H10W 90/297 Electricity & electronicsH10B 80/00 Electricity & electronicsH10D 80/30 Electricity & electronicsH10W 20/2134 Electricity & electronicsH10W 20/435 Electricity & electronicsH10W 74/137 Electricity & electronics

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.