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Samsung patents film-based chip package with side-exposed wires

Samsung describes a method for making a semiconductor package using a flexible film substrate instead of a rigid one. The design places metal wires on the top of the film, with specific openings that expose connection points on the side edges for external soldering and in the center for attaching the chip.

Why it mattersThis filing details a specific manufacturing technique for packaging chips, which could help in creating thinner or more flexible electronic components.

In the filing’s own words

A semiconductor package includes a film substrate; a plurality of wires on an upper surface of the film substrate; an upper insulating film covering the plurality of wires on the upper surface of the film substrate and defining a plurality of pad openings and a mounting region opening such that, the plurality of pad openings expose at least a portion of an outer lead bonding portion of the plurality of wires along at least one of the first side surface or the second side surface and the mounting region opening exposes at least a portion of an inner lead bonding portion of the plurality of wiring; a semiconductor chip bonded to and electrically connected to the exposed inner lead bonding portion, and at least one support pattern on a lower surface of the film substrate and extending in the first direction to overlap with the plurality of pad openings.

What exactly they claim (claim 1)

1. A method of manufacturing semiconductor package comprising: preparing a film substrate including a chip mounting region, an upper surface, a lower surface, and a first side surface and a second side surface extending in a first direction such that the film substrate is elongated in the first direction; forming a first metal lead portion on the upper surface of the film substrate, the first metal lead portion having an inner lead bonding portion at least partially within the chip mounting region and an outer lead bonding portion extending from the inner lead bonding portion to at least one of the first side surface or the second side surface; forming a second metal lead portion extending in the first direction on the lower surface of the film substrate; forming an upper insulating film on the upper surface of the film substrate, the upper insulating film defining a plurality of pad openings and a mounting region opening such that the plurality of pad openings exposes at least a portion of the outer lead bonding portion along the at least one of the first side surface or the second side surface, and the mounting region opening exposes at least a portion of the inner lead bonding portion on the chip mounting region on the first metal lead portion; forming a lower insulating film enveloping the second metal lead portion; and mounting a semiconductor chip on the chip mounting region of the film substrate such that the semiconductor chip is bonded to and electrically connected to the exposed inner lead bonding portion, wherein the second metal lead portion is spaced apart from the semiconductor chip in a plan view and overlaps with the plurality of pad openings along at least one of the first side surface or the second side surface.

Facts

Company
Samsung (Samsung Electronics Co., Ltd.)
Official title
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
Publication number
US20260271760A1
Application number
19665178
Filed
May 1, 2026
Published
Sep 10, 2026
Inventors
4
Claims
20

Classified under

H10W 70/685 Electricity & electronicsH10W 70/65 Electricity & electronicsH10W 74/15 Electricity & electronicsH10W 90/724 Electricity & electronicsH10W 90/734 Electricity & electronics
Read the full filing (official PDF) ↗ Open in the Patent Tracker

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Summaries are simplified from the filing’s own abstract and first claim. A patent filing is not a product announcement.
Patent data and drawings: U.S. Patent and Trademark Office (USPTO). Nebula is not affiliated with or endorsed by the USPTO.